A High Performance Simulator System for a Multiprocessor System Based on a Multi-way Cluster

In the ubiquitous era, it is necessary to research the architectures of multiprocessor system with high performance and low power consumption. A simulator developed in high level language is useful because of its easily changeable system architecture including application specific instruction sets and functions. However, there is a problem in processing speed that both PCs and workstations provide insufficient performance for the simulation of a multiprocessor system. In this research, a simulator for a multiprocessor system based on the multi-way cluster was developed, because it was expected to provide the high parallelism and high performance with multiple CPUs on each node. In the developed simulator system, one processor model consists of an instruction set simulator (ISS) process and several inter-processor communication processes. For the maximization of the simulation performance, each processor model is assigned to the specific CPU on the multi-way cluster. Also, each inter-processor communication process is implemented with MPI, which can minimize the CPU resource usage in a communication waiting state. The evaluation results of the processing and communication performance using a distributed application program such as JPEG encoding show that each ISS process in the developed simulator system consumes approximately 100% CPU resources keeping enough inter-processor communication performance. This result means the performance increases in proportion to the number of integrated CPUs on the cluster. This paper concludes the simulator system is useful for the simulation of a multiprocessor system suitable for the ubiquitous era.